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  128mb: 8 meg x 16 mobile ddr sdram advance ? pdf: 09005aef818ff781/source: 09005aef818ff799 micron technology, inc., reserves the right to change products or specifications without notice. mt46h8m16.fm - rev. a 03/05 en 1 ?2005 micron technology, inc. all rights reserved. ?products and specifications discus sed herein are for evaluation a nd reference purposes only and ar e subject to change by micro n without notice. products are only warranted by micron to meet micron?s production data sheet specifications. mobile double data rate (ddr) sdram MT46H8M16LF ? 2 meg x 16 x 4 banks for a complete data sheet, please refer to www.micron.com/mobileds . features ?v dd = +1.8v 0.1v, v dd q = +1.8v 0.1v  bidirectional data strobe per byte of data (dqs)  internal, pipelined double data rate (ddr) architecture; two data accesses per clock cycle  differential clock inputs (ck and ck#)  commands entered on each positive ck edge  dqs edge-aligned with data for reads; center- aligned with data for writes  four internal banks for concurrent operation  data masks (dm) for masking write data?one mask per byte  programmable burst lengths: 2, 4, or 8  concurrent auto precharge option is supported  auto refresh and self refresh modes  1.8v lvcmos compatible inputs  on-chip temperature sensor to control refresh rate  partial array self refresh (pasr)  selectable output drive (ds)  clock stop capability options marking v dd /v dd q  1.8v/1.8v h  configuration  8 meg x 16 (2 meg x 16 x 4 banks) 8m16 plastic package  60-ball vfbga (lead-free) 8mm x 10mm cf  timing ? cycle time  7.5ns @ cl = 3  10ns @ cl = 3 -6 -10  operating temperature range  commercial (0 to +70c)  industrial (-40c to +85c) none it figure 1: 60-ball vfbga assignment (top view) table 1: configuration addressing architecture 8 meg x 16 configuration 2 meg x 16 x 4 refresh count 4k row addressing 4k (a0?a11) bank addressing 4 (ba0, ba1) column addressing 1k (a0?a9) table 2: key timing parameters speed grade clock rate data-out window access time dqs-dq skew cl = 3 cl = 2 -75 133 mhz - 2ns 6.0s +0.6ns -10 104 mhz - 2.8ns 7.0ns +0.7ns -75 - 83 mhz 4ns 6.5ns +0.6ns -10 67 mhz 5ns 7.0ns +0.7ns 1234 6789 5 a b c d e f g h j k v ss q dq14 dq12 dq10 dq8 nc ck# a12 /nc a8 a5 v ss v dd q v ss q v dd q v ss q v ss cke a9 a6 v ss dq15 dq13 dq11 dq9 udqs udm ck a11 a7 a4 v dd q dq1 dq3 dq5 dq7 nc we# cs# a10 /ap a2 dq0 dq2 dq4 dq6 ldqs ldm cas# ba0 a0 a3 v dd v ss q v dd q v ss q v dd q v dd ras# ba1 a1 v dd
? 8000 s. federal way, p.o. box 6, boise, id 83707-0006, tel: 208-368-3900 prodmktg@micron.com www.micron.com customer comment line: 800-932-4992 micron, the m logo, and the micron logo are tr ademarks of micron technology, inc. all other trademarks are the prope rty of their respective owners. advance: this data sheet contains initial de scriptions of products still under development. 128mb: 8 meg x 16 mobile ddr sdram advance pdf: 09005aef818ff781/source: 09005aef818ff799 micron technology, inc., reserves the right to change products or specifications without notice. mt46h8m16.fm - rev. a 03/05 en 2 ?2005 micron technology, inc. all rights reserved.
pdf: 09005aef818ff781/source: 09005aef818ff799 micron technology, inc., reserves the right to change products or specifications without notice. mt46h8m16.fm - rev. a 03/05 en 3 ?2005 micron technology, inc. all rights reserved. 128mb: 8 meg x 16 mobile ddr sdram advance revision history  original document, advance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 03/05


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